1. Field of the Invention
The invention relates in general to a semiconductor package, and more particularly to a semiconductor package having inner leads and bumps.
2. Description of the Related Art
In the process of packaging a chip into a tape carrier package (TCP) or chip on film (COF) package, the feature is that a tape carrier composed of an organic base is used to replace the conventional lead frame or substrate to serve as the foundation on which the chip is mounted. In addition, the package processes are made in a batch manner on a continuous tape row by tape automated bonding (TAB) process such that each chip is mounted on each tape carrier.
FIG. 1 is a top view showing a conventional semiconductor package. As shown in FIG. 1, the semiconductor package 10 is, for example, a TCP and includes a tape carrier 12 and a chip 14. The chip 14 has an active surface 14a and lateral surfaces 14b, 14c, 14d and 14e connected to the active surface 14a. The active surface 14a has several input/output (I/O) bonding pads (such as Al (aluminum) pads), on which first gold bumps 18 and second gold bumps 20 are covered. The first gold bumps 18 are spaced by the second gold bumps 20. For the first gold bumps 18 and the second gold bumps 20 adjacent to the individual lateral surface 14b, 14c, 14d or 14e, the first gold bumps 18 are farther from the adjacent lateral surface 14b, 14c, 14d or 14e than the second gold bumps 20 are.
The tape carrier 12 has a base 15, a cavity 16 for accommodating the chip 14, a number of first inner leads 22 and a number of second inner leads 24. It is to be noted that if the semiconductor package 10 is a COF package, the tape carrier 12 need not to have the cavity 16 and the chip 14 is directly disposed on the tape carrier 12. The cavity 16 is used for accommodating the chip 14. The first inner leads 22 are spaced by the second inner leads 24. The distal ends of the first inner leads 22 and the second inner leads 24 are exposed to the opening of the cavity 16 and electrically bonded to the first gold bumps 18 and the second gold bumps 20, respectively. The chip 14 is disposed on the tape carrier 12, and the chip 14 may be electrically connected to an external circuit via the first inner leads 22 and the second inner leads 24.
It is to be noted that the first bumps 18 and the second bumps 20 may be respectively bonded to the first inner leads 22 and the second inner leads 24 by inner lead bonding (ILB) process after the chip 14 is embedded into the cavity 16.
FIG. 2 is a partially enlarged schematic illustration showing the semiconductor package of FIG. 1. In FIG. 2, for example, the width of the first gold bump 18 equals the width of the second gold bump 20, and each of the first inner leads 22 and the second inner leads 24 has a longitudinal shape with a constant width. The width of the first inner lead 22 equals the width of the second inner lead 24, and the width of the first gold bump 18 is greater than that of the first inner lead 22. The pitch between the adjacent first gold bump 18 and the second gold bump 20 is A, and the width of each of the first gold bumps 18 and the second gold bumps 20 is B. The width of each of the first inner leads 22 and the second inner leads 24 is C, and the pitch between the adjacent first inner lead 22 and the second gold bump 20 is D. Of which, the value of D is equal to the result determined value of A-B/2-C/2. For example, the values of A, B and C are respectively 37, 36 and 20 micrometers (μm), and the value of D is 9 μm. That is, when the first gold bump 18 and the second gold bump 20 are respectively aligned with and bonded to the distal ends of the first inner lead 22 and the second inner lead 24, the pitch between the adjacent first inner lead 22 and the second gold bump 20 is 9 μm.
However, when the first gold bump 18 and the second gold bump 20 are respectively bonded to the distal ends of the first inner lead 22 and the second inner lead 24 in a misaligned manner, the first inner lead 22 tends to be electrically connected to the adjacent second gold bump 20 because the first inner lead 22 has the longitudinal shape with a constant width, and the pitch between the first inner lead 22 and the second gold bump 20 is very small. Thus, the serious short-circuited phenomenon, which greatly influences the electrical quality of the semiconductor package 10, may be caused.